chinese
目录 (Table of Contents)
Main sections:
数字逻辑概论
逻辑代数与硬件描述语言基础
逻辑门电路
数字 (shùzì) → Number / Digital
逻辑 (luójí) → Logic
概论 (gàilùn) → Introduction
逻辑 (luójí) → Logic
代数 (dàishù) → Algebra
与 (yǔ) → And
硬件 (yìngjiàn) → Hardware
描述 (miáoshù) → Description
语言 (yǔyán) → Language
基础 (jīchǔ) → Basics / Foundation
逻辑 (luójí) → Logic
门 (mén) → Gate
电路 (diànlù) → Circuit
Subsections under section 1:
1.1 数字信号与数字电路
1.2 数制
1.3 二进制的基本运算
1.4 二进制代码
1.5 二值逻辑变量与基本逻辑运算
1.6 逻辑函数及其表示方法
Subsections under section 2:
2.1 逻辑代数的基本定律和规则
2.2 逻辑函数表达式的形式
2.3 逻辑函数的代数化简法
2.4 逻辑函数的卡诺图化简法
2.5 硬件描述语言 Verilog HDL
khmer
english
Introduction to Digital Logic (数字逻辑概论)
1.1 Digital Signals and Digital Circuits
1.1.1 Development and Application of Digital Technology
1.1.2 Digital Circuit Characteristics
1.1.3 Binary Information and Digital Signals
1.1.4 Digital Signal Encoding Methods
1.2 Number Systems
1.2.1 Decimal System
1.2.2 Binary System
1.2.3 Conversion between Decimal and Binary
1.2.4 Hexadecimal and Octal Systems
1.3 Basic Binary Operations
1.3.1 Addition and Subtraction of Binary Numbers
1.3.2 Subtraction of Binary Numbers
1.4 Binary Codes
1.4.1 BCD Code
1.4.2 Gray Code
1.4.3 ASCII Code
1.5 Binary Logic Variables and Basic Logic Operations
1.6 Logic Functions and Their Representation
1.6.1 Standard Forms of Logic Functions
1.6.2 Graphical Representation of Logic Functions
Boolean Algebra and Hardware Description Language Basics
2.1 Basic Laws and Rules of Boolean Algebra
2.1.1 Basic Theorems and Equations
2.1.2 Basic Rules
2.2 Forms of Logic Function Expressions
2.2.1 Basic Forms
2.2.2 Minimal Term and Minimal Product Expression
2.2.3 Maximal Term and Maximal Product Expression
2.3 Algebraic Simplification of Logic Functions
2.3.1 Form Simplification
2.3.2 Optimization Methods
2.4 Karnaugh Map Simplification Method
2.4.1 Using K-Maps to Display Logic Functions
2.4.2 Using K-Maps to Simplify Logic Functions
2.5 Hardware Description Language Verilog HDL
2.5.1 Basic Syntax Rules of Verilog
2.5.2 Data Types
2.5.3 Operators and Their Priority
2.5.4 Basic Gate Level Elements
2.5.5 Basic Structure of Verilog
2.5.6 Function Module Description and Testing
Logic Gates and Circuits